iCODING can provide the solutions for a diverse range of communication needs. We offer the expertise and experience of our team of engineers to design and build custom solutions or choose from one of our off the shelf solutions of iterative turbo decoders.

The current iCODING family of iterative turbo decoder cores includes; the S1000 High Speed Iterative Decoder, the S2000 Family of DVB-RCS/T Compliant Products, the S3000 3GPP Compliant Decoder, and the S4000 High Speed FPGA Decoder.


 
     
  S7000 DVB-RCS2 Compliant Turbo Code Code Decoder Core  
 

This DVB-RCS2 core is available in a variety of configurations and functionality sets.

  • Low Overhead
  • Fully Standards Compliant
  • Includes all interleaving and buffering functionality
  • Available for Altera and other FPGA platforms
  •  

    Product Brief - S7000_decoder_brief_v1.0.pdf*

 
  S3016 - 3GPP-LTE compliant Turbo Code Cores  
 

This 3GPP-LTE compliant (Long Term Evolution) core is available in 50 Mbit/sec and 100 Mbit/sec versions for Altera and other FPGA platforms.

  • Low Latency
  • Fully Standards Compliant
  • Drop in Core
  • Includes all interleaving and buffering functionality
  • Available for Altera and other FPGA platforms
  •  

    S3016 Product Brief - s3016brief.pdf*

 
  S1000 - High Speed Iterative Decoder  
 
  • 15 Mbits/Sec Xilinx/Altera FPGA
  • No external memory needed in FPGA
  • Frame sizes up to 16 Kbits
  • Quasi-Error-Free (QEF) Mode
  • >3dB performance improvement over TCM
  • > 45 Mbits/Sec ASIC
  • Configurable to desired device, gate count, data rate, FEC performance
  • Supports QPSK, 8PSK, and 16QAM modes
  • Inmarsat Compatible
  •  

    S1000 product information - S1000product_info.pdf*

 
     
   
S2000 - Family of DVB-RCS Compliant Products
 
  • ASIC Validated Solution
  • Encoder - 15 Mbits/Sec Xilinx/Altera FPGA
  • Encoder - 100 Mbits/Sec for large Virtex II parts
  • Decoder - 95 Mbits/Sec Xilinx/Altera FPGA
  • No external memory needed in FPGA
  • Quasi-Error-Free Performance, BER 1e-10 and lower for small frame sizes.
  • Outperforms Turbo Block Codes by 0.5 to 1.0 dB.
  • Ideal for packet-based communications links including one way satellite, terrestrial wireless, and wireline communications systems.
  • S2000 DVB Compliant Product Briefs

    S2000 DVB-RCS Turbo Decoder - S2000.pdf
    S2001 DVB-RCS Turbo Encoder - S2001.pdf
    S2002 DVB-RCS Turbo Encoder/Decoder - S2002.pdf
    S2100 DVB-RCT Turbo Decoder - S2100.pdf

     

 
     
  3GPP Compliant Decoder Core - S3000  
 
  • ASIC Validated Solution
  • 2 Mbits/Sec
  • Low memory requirements
  • No external memory required
  • Low power consumption
  • Low complexity

    S3000 3GPP Turbo Decoder Product Brief - S3000.pdf

 
     
  High Speed FPGA Turbo Decoder- S4000  
 
  • 200 Mbit/s or higher, single Virtex II
  • 100 Mbit/s or higher, single Virtex E
  • No external memory required
  • Low latency (single frame)

    S4000 FPGA Turbo Decoder Product Brief - S4000.pdf

 
  Product specifications available upon request at info@icoding.com.  
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